Fully Integrated CMOS Power Amplifier Design Using the Distributed Active-Transformer Architecture

I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri

A novel on-chip impedance matching and power combining method, the distributed active transformer is presented. It combines several low-voltage push–pull amplifiers efficiently with their outputs in series to produce a larger output power while maintaining a 50- match. It also uses virtual ac grounds and magnetic couplings extensively to eliminate the need for any off chip component, such as tuned bonding wires or external inductors. Furthermore, it desensitizes the operation of the amplifier to the inductance of bonding wires making the design more reproducible.

To demonstrate the feasibility of this concept, a 2.4-GHz

2-W 2-V truly fully integrated power amplifier with 50-

input

and output matching has been fabricated using 0.35- m CMOS

transistors. It achieves a power added efficiency (PAE) of 41% at

this power level. It can also produce 450 mW using a 1-V supply.

Harmonic suppression is 64 dBc or better. This new topology

makes possible a truly fully integrated watt-level gigahertz range

low-voltage CMOS power amplifier for the first time.