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Senior RFIC Design engineer with 5+ years of experience in DC-100 GHz integrated circuit and system design, analysis, simulation, and measurement.
Expertise in broadband analog, mixed-signal, and RF integrated circuit design in submicron CMOS, SOI CMOS, SiGe BiCMOS, and InP BiCMOS Processes.
Lead researcher for IC development for DARPA RADER and DARPA CoSMOS programs.
