Compact power splitters designed ab initio using binary particle swarm optimization in a 2D mesh for a standard foundry silicon photonic platform are studied. Designs with a 4.8 μm × 4.8 μm footprint composed of 200 nm × 200 nm and 100 nm × 100 nm cells are demonstrated. Despite not respecting design rules, the design with the smaller cells had lower insertion losses and broader band- width and showed consistent behavior across the wafer. Deviations between design and experiments point to the need for further investigations of the minimum feature dimensions.