Silicon Integrated 280 GHz Imaging Chipset With 4×4 SiGe Receiver Array and CMOS Source

K. Sengupta, D. Seo, L. Yang, and A. Hajimiri

In this paper, we report an integrated silicon-based active imaging chipset with a detector array in 0.13 μm SiGe process and a CMOS-based source array operating in the 240–290 GHz range. The chipset operates at room-temperature with no external RF or optical sources, high-resistivity silicon lenses (HRSi) or waveguides or any custom fabrication options, such as high-resistivity substrates or substrate thinning. The receiver chip consists of a 2-D array of 16 pixels, measuring 2.5 mm x 2.5 mm with integrated antennas. An electromagnetic-active circuit co-design approach is carried out to ensure high-efficiency interface with detectors operating above cut-off frequencies with good impedance matching, near-optimal noise performance, while simultaneously suppressing the dominant surface-wave modes in a lensless lossy bulk silicon substrate. The array performance is characterized in the WR-3 band between 220–320 GHz. At the designed frequency of 260 GHz, the NEP of all pixels stays be- tween 7.9 pW/√Hz–8.8 pW/√Hz. The imaging chipset consists of this 2D detector array chip and a CMOS-based source array chip measuring 0.8 mm x 0.8 mm. The entire system dissipates less than 180 mW of DC power, representing a truly integrated solution.