Realization of a multilayer photonic process, as well as co-integration of a large number of photonic and electronic components on a single substrate, presents many advantages over conventional solutions and opens a pathway for various novel architectures and applications. Despite the many potential advantages, realization of a complex multilayer photonic process compatible with low-cost CMOS platforms remains challenging. In this paper, a photonic platform is investigated that uses subtractively manufactured structures to fabricate such systems. These structures are created solely using simple post-processing methods, with no modification to the foundry process. This method uses the well-controlled metal layers of advanced integrated electronics as sacrificial layers to define dielectric shapes as optical components. Metal patterns are removed using an etching process, leaving behind a complex multilayer photonic system, while keeping the electronics’metal wiring intact. This approach can be applied to any integrated chip with well-defined metallization, including those produced in pure electronics processes, pure photonics processes, heterogeneously integrated processes, monolithic electronic-photonic processes, etc. This paper provides a proof-of-concept example of monolithic electronic-photonic integration in a 65 nm bulk CMOS process and demonstrates proof-of-concept photonic structures. The fabrication results, characterization, and measurement data are presented.